FPGA UART

Src:
http://www.bealto.com/fpga-uart.html


Notes :
A good website for FPGA code study. Editor has some example for UART & DSP related module.
User start FPGA development w/ Xilinx Spartan-6 LX45


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FPGA Simple UART

Eric Bainville - Apr 2013

Introduction

Curious about how the hardware I use (i.e. fight with) every day is designed, I decided to acquire a FPGA board and start programming it in VHDL. The long term objective is to design some kind of basic OpenCL compute device. I know it sounds a bit ambitious; we'll see how far we can get...

So, I ordered a Digilent Atlys Board from Amazon. This board is based on a Xilinx Spartan-6 LX45 FPGA, and provides a lot of features, including HDMI, audio, USB, Ethernet, and 128MB of RAM.

To use the board, you will need to download a few files:

• Xilinx ISE WebPack (more than 6 GB),
• Digilent Adept software, manuals, and demos from their Atlys page,
• Exar USB-UART driver.

The board comes with a preloaded demo displaying some basic color patterns, and controlling the audio and LEDs from the various switches and push buttons. This demo can be downloaded from Digilent site in source and binary form. The binary can then be re-programmed later into the board.

Next step is to run the Xilinx ISE Design Suite, and start writing some code. Mike Field's Hamsterworks site provides an excellent FPGA course, and a large number of sample projects. I started following the different modules of the online course, which got me up and running in no time. Thanks Mike!

Below is my first serious design: a very simple UART (Universal Asynchronous Receiver/Transmitter). Since this is my first design, I put this online mainly for the fun of updating my site after a very long hiatus. There are already plenty of more complete/efficient/flexible/tested UART designs on the Internet. If you are an FPGA expert and ended up reading this, please drop me a line if you see something really wrong...

Contents

• Serial I/O - How the data is serialized.
• Reception - Reception process.
• Transmission - Transmission process.
• Testing - A simple test: echo back all received characters.

Downloads

This archive contains the two entities described in this page, and the corresponding user constraints file for the Atlys board:  basic_uart-20130424.zip (3 KB)

Eric Bainville

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FPGA Simple UART : Serial I/O